The paper discusses the need of switched backplanes to provide simultaneous transfer of multiple packets. Routers most perform datapath function (forwarding decision) on each datagram. Thus improving routers performance requires improving the performance of datapath functions. General trend in performance improvement involves implementing datapath functions at the hardware level, adding parallelism and replacing shared buses.
The author proposes using crossbar switch in which multiple line cards can communicate with each other simultaneously and this greatly enhances performance. He argues that very high speed shared backplanes are impractical because of congestion (since bandwidth is shared) and transfer capacity of a multiport shared bus is limited by electrical loading.
A crossbar switch gives high performance because the connections from the line cards to the central switch are simple point-to-point links and thus they can operate at high speed. Also, it can support multiple bus transactions simultaneously increasing aggregate bandwidth. It is simple to pass fixed-length cells across a switched backplane and they are chosen for providing better performance. Even though crossbar switches are non-blocking they experience head-of-line (HOL), input and output blocking. HOL is addressed by virtual queueing and prioritization mechanisms address the delay introduced due to input and output blocking.
Crossbar scheduling algorithm should provide high throughput, be starvation free, fast and simple to implement. The paper discusses iSLIP algorithm that is used by crossbar switches. Multicast traffic can be handled easily by closing multiple crosspoints simultaneously thus performing cell replication within the fabric.
It was insightful to see how the hardware of a router is designed to achieve better performance. Until now I had never thought about hardware techniques used improving router performance. I must say that the paper is written very nicely. I was under the assumption that since the paper is more about hardware I will not understand the paper very nicely. But the paper gave a very clear picture of what decisions were made and why. The paper should definitely be kept in the syllabus.
It seems that the centralized scheduler can become a bottleneck in case of high-speed traffic and cause delay.
The author proposes using crossbar switch in which multiple line cards can communicate with each other simultaneously and this greatly enhances performance. He argues that very high speed shared backplanes are impractical because of congestion (since bandwidth is shared) and transfer capacity of a multiport shared bus is limited by electrical loading.
A crossbar switch gives high performance because the connections from the line cards to the central switch are simple point-to-point links and thus they can operate at high speed. Also, it can support multiple bus transactions simultaneously increasing aggregate bandwidth. It is simple to pass fixed-length cells across a switched backplane and they are chosen for providing better performance. Even though crossbar switches are non-blocking they experience head-of-line (HOL), input and output blocking. HOL is addressed by virtual queueing and prioritization mechanisms address the delay introduced due to input and output blocking.
Crossbar scheduling algorithm should provide high throughput, be starvation free, fast and simple to implement. The paper discusses iSLIP algorithm that is used by crossbar switches. Multicast traffic can be handled easily by closing multiple crosspoints simultaneously thus performing cell replication within the fabric.
It was insightful to see how the hardware of a router is designed to achieve better performance. Until now I had never thought about hardware techniques used improving router performance. I must say that the paper is written very nicely. I was under the assumption that since the paper is more about hardware I will not understand the paper very nicely. But the paper gave a very clear picture of what decisions were made and why. The paper should definitely be kept in the syllabus.
It seems that the centralized scheduler can become a bottleneck in case of high-speed traffic and cause delay.
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